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integrated silicon solution, inc. 1-800-379-4774 1 target specification sr070-0t 05/01/99 features ? voltage range options -- 1.6v to 2.0v: is62ut25616 -- 1.8v to 2.2v: is62us25616 -- 2.3v to 2.7v: is62ur25616 -- 2.7v to 3.3v: is62up25616 ? battery backup (sl/ll version) -- 1.0v (min.) data retention ? access times: 55, 70, and 100 ns ? fully static operation and tri-state outputs ? industrial temperature available ? available in 48-ball mini bga and 44-pin stsop (type ii) is62ux25616 series 256k x 16 low voltage, low power cmos static ram description the issi is62ux25616 series is a low voltage, 262,144 words by 16 bits, cmos sram. it is fabricated using issi 's low voltage, six transistor (6t), cmos technology. the series is targeted to satisfy the demands of the state- of-the-art technologies such as cell phones and pagers. when ce is high (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with cmos input levels. additionally, easy memory expansion is provided by using chip enable and output enable inputs, ce and oe . the active low write enable ( we ) controls both writing and reading of the memory. a data byte allows upper byte ( ub ) and lower byte ( lb ) access. the is62ux25616 series is packaged in the 48-ball mini bga and the 44-pin stsop (type ii). advance information may 1999 issi ? product series overview standby current ( m a) part no. voltage (v) speeds (ns) active i cc (ma) ll sl temperature ( c) is62up25616 3.0, 0.3 55, 70, 100 25 @ 70 ns 10 2 0 to 70 is62up25616 (1) 3.0, 0.3 55, 70, 100 25 @ 70 ns 10 2 40 to 85 is62ur25616 2.5, 0.2 55, 70, 100 15 @ 70 ns 10 2 0 to 70 is62ur25616 (1) 2.5, 0.2 55, 70, 100 15 @ 70 ns 10 2 40 to 85 is62us25616 2.0, 0.2 55, 70, 100 10 @ 70 ns 10 2 0 to 70 is62us25616 (1) 2.0, 0.2 55, 70, 100 10 @ 70 ns 10 2 40 to 85 is62ut25616 1.8, 0.2 55, 70, 100 10 @ 70 ns 10 2 0 to 70 is62ut25616 (1) 1.8, 0.2 55, 70, 100 10 @ 70 ns 10 2 40 to 85 note: 1. current value is max. target specification this document is a target specification only. issi reserves the right to make changes to its products at any time without noti ce in order to improve design and supply the best possible product. we assume no responsibility for any errors which may appear in this publication. ? copyright 1999, integrated silico n solution, inc. 2231 lawson lane ? santa clara, ca 95054-3311 ? 1-800-379-4774 ? fax: (408) 588-0806 e-mail: sales@issiusa.com ? www.issiusa.com
is62ux25616 series 2 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification functional block diagram a0-a17 ce oe we 256k x 16 memory array decoder column i/o control circuit gnd vcc i/o data circuit i/o0-i/o7 lower byte i/o8-i/o15 upper byte ub lb
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 3 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification pin configurations pin descriptions a0-a16 address inputs i/o0-i/o15 data inputs/outputs ce chip enable input oe output enable input we write enable input lb lower-byte control (i/o0-i/o7) ub upper-byte control (i/o8-i/o15) nc no connection vcc power gnd ground 48-ball mini bga (b) 1 2 3 4 5 6 a b c d e f g h lb oe a0 a1 a2 n/c i/o8 ub a3 a4 ce i/o0 i/o9 a5 a6 i/o1 i/o2 gnd a17 a7 i/o3 vcc vcc nc a16 i/o4 gnd i/o 13 i/o 14 i/o 15 i/o 12 i/o 11 i/o 10 a14 a15 i/o5 i/o6 nc a12 a13 we i/o7 nc a8 a9 a10 a11 nc 44-pin stsop (type ii): (h) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 a4 a3 a2 a1 a0 ce i/o0 i/o1 i/o2 i/o3 vcc gnd i/o4 i/o5 i/o6 i/o7 we a17 a16 a15 a14 a13 a5 a6 a7 oe ub lb i/o15 i/o14 i/o13 i/o12 gnd vcc i/o11 i/o10 i/o9 i/o8 nc a8 a9 a10 a11 a12
is62ux25616 series 4 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification absolute maximum ratings (1) symbol parameter value unit v cc power supply voltage related to gnd C0.5 to +4.0 v v term terminal voltage with respect to gnd C0.5 to vcc + 0.5 v t stg storage temperature C65 to +150 c t bias temperature under bias com. C10 to +85 c ind. C45 to +90 c p t power dissipation 2.0 w iout dc output current 20 ma notes: 1. stress greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. operating range range ambient temperature commercial 0 c to +70 c industrial C40 c to +85 c capacitance (1) symbol parameter conditions max. unit c in input capacitance v in = 0v 6 pf c out input/output capacitance v out = 0v 8 pf note: 1. tested initially and after any design or process changes that may affect these parameters. truth table i/o pin mode we we we we we ce ce ce ce ce oe oe oe oe oe lb lb lb lb lb ub ub ub ub ub i/o0-i/o7 i/o8-i/o15 vcc current not selected x h x x x high-z high-z i sb , i sb 1 x x x h h high-z high-z output disabled h l h x x high-z high-z i cc , i cc 1 x l x h h high-z high-z read h l l l h d out high-z i cc , i cc 1 h l l h l high-z d out hllll d out d out write l l x l h d in high-z i cc , i cc 1 l l x h l high-z d in llxll d in d in notes: 1. h = v ih , l = v il , x = don't care. 2. ub , lb (upper, lower byte enable). these active low inputs allow individual bytes to be written or read. when lb is low, data is written or read to the lower byte, i/o0-i/o7. when ub is low, data is written or read to the upper byte, i/o8-i/o15.
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 5 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification ac test conditions (over operating range) parameter unit input pulse level (1) is62up25616 0.4v to 2.2v is62ur25616 0.4v to 2.2v is62us25616 0.4v to 1.8v is62ut25616 0.4v to 1.6v input rise and fall times 5 ns input and output timing is62up25616 1.5v and reference level is62ur25616 1.1v is62us25616 0.9v is62ut25616 0.8v output load (all test parameters except in note 2) cl 1 = 30 pf (see figure 1) + 1ttl load output load (1) (all high-z and low-z parameters) cl 2 = 5 pf (see figure 1) notes: 1. including jig and scope capacitance. 2. v tm = 2.8v for vcc = 3.0v 0.3v v tm = 2.3v for vcc = 2.5v 0.2v v tm = 1.8v for vcc = 2.0v 0.2v v tm = 1.6v for vcc = 1.8v 0.2v ac test loads 3070 w 3150 w d out cl1, cl2 v tm figure 1
is62ux25616 series 6 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification power supply characteristics (1) (over operating range) symbol parameter test conditions min. max. unit i cc static operating ce = v il , v in = v ih or v il , vcc = 3.0v 0.3v 15 ma power supply current i i/o = 0 ma, f = 0 vcc = 2.5v 0.2v 10 vcc = 2.0v 0.2v 8 vcc = 1.8v 0.2v 6 i cc 1 dynamic operating vcc = 3.0v 0.3v 55 ns 35 ma power supply current i out = 0 ma, f = f max 70 ns 25 (is62up25616) 100 ns 20 i cc 1 dynamic operating vcc = 2.5v 0.2v 55 ns 20 ma power supply current i out = 0 ma, f = f max 70 ns 15 (is62ur25616) 100 ns 8 i cc 1 dynamic operating vcc = 2.0v 0.2v 55 ns 12 ma power supply current i out = 0 ma, f = f max 70 ns 10 (is62us25616) 100 ns 7 i cc 1 dynamic operating vcc = 1.8v 0.2v 55 ns 11 ma power supply current i out = 0 ma, f = f max 70 ns 9 (is62ut25616) 100 ns 6 i sb ttl standby current v cc = 3.0v 0.3v, ce = v ih is62up25616 0.5 ma (ttl inputs) v cc = 2.5v 0.2v, ce = v ih is62ur25616 0.3 v cc = 2.0v 0.2v, ce = v ih is62us25616 0.3 v cc = 1.8v 0.2v, ce = v ih is62ut25616 0.3 i sb 1 cmos standby ce 3 v cc C 0.2v ll versions 10 m a sl versions 2 note: 1. at f = f max , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. dc electrical characteristics (over operating range) symbol parameter test conditions min. max. unit v oh output high voltage v cc = 3.0v 0.3v, i oh = C2.1 ma 2.2 v v cc = 2.5v 0.2v, i oh = C0.5 ma 2.0 v cc = 2.0v 0.2v, i oh = C0.44 ma 1.6 v cc = 1.8v 0.2v, i oh = C0.44 ma 1.4 v ol output low voltage v cc = 3.0v 0.3v, i ol = 2.1 ma 0.4 v v cc = 2.5v 0.2v, i ol = 0.5 ma v cc = 2.0v 0.2v, i ol = 0.33 ma v cc = 1.8v 0.2v, i ol = 0.26 ma v ih input high voltage is62up25616 2.2 v cc + 0.2 v is62ur25616 2.0 v cc + 0.2 is62us25616 1.6 v cc + 0.2 is62ut25616 1.4 v cc + 0.2 v il (1) input low voltage C0.2 0.4 v i li input leakage gnd v in v cc C1 1 m a i lo output leakage gnd v out v cc , ce = v ih or oe = v ih or C1 1 m a we = v il or ub = v ih or lb = v ih note: 1. v il (min.) = C0.5v for pulse width less than 10 ns.
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 7 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification read cycle switching characteristics (1) (over operating range) -55 -70 -100 symbol parameter min. max. min. max. min. max. unit t rc read cycle time 55 70 100 ns t aa address access time 55 70 100 ns t oha output hold time 10 10 10 ns t ace ce access time 55 70 100 ns t doe oe access time 30 35 50 ns t hzoe (2) oe to high-z output 20 25 30 ns t lzoe (2) oe to low-z output 5 5 5 ns t hzce (2) ce to high-z output 0 20 0 25 0 30 ns t lzce (2) ce to low-z output 10 10 10 ns t ba lb , ub access time 55 70 100 ns t hzb lb , ub to high-z output 0 20 0 25 0 35 ns t lzb lb , ub to low-z output 5 5 5 ns notes: 1. test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5v, input pulse levels of 0.4 to 2.2v and output loading specified in figure 1. 2. tested with the load in figure 2. transition is measured 500 mv from steady-state voltage. not 100% tested. data valid previous data valid t aa t oha t oha t rc d out address ac waveforms read cycle no. 1 (1,2) (address controlled) ( ce = oe = v il , ub or lb = v il )
is62ux25616 series 8 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification write cycle switching characteristics (1,2) (over operating range) -55 -70 -100 symbol parameter min. max. min. max. min. max. unit t wc write cycle time 55 70 100 ns t sce ce to write end 45 60 80 ns t aw address setup time to write end 45 60 80 ns t ha address hold from write end 0 0 0 ns t sa address setup time 0 0 0 ns t pwb lb , ub valid to end of write 45 60 80 ns t pwe 1 we pulse width 45 60 80 ns t pwe 2 we pulse width 45 60 80 ns t sd data setup to write end 25 30 40 ns t hd data hold from write end 0 0 0 ns t hzwe (3) we low to high-z output 30 30 40 ns t lzwe (3) we high to low-z output 5 5 5 ns notes: 1. test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5v, input pulse levels of 0.4v t o 2.2v and output loading specified in figure 1. 2. the internal write time is defined by the overlap of ce low and ub or lb , and we low. all signals must be in valid states to initiate a write, but any one can go inactive to terminate the write. the data input setup and hold timing are referenced to the rising or falling edge of the signal that terminates the write. 3. tested with the load in figure 1. transition is measured 200 mv from steady-state voltage. not 100% tested. t rc t oha t aa t doe t lzoe t ace t lzce t hzoe high-z data valid t hzb address oe ce lb, ub d out t hzce t ba t lzb ac waveforms read cycle no. 2 (1,3) notes: 1. we is high for a read cycle. 2. the device is continuously selected. oe , ce , ub , or lb = v il . 3. address is valid prior to or coincident with ce low transition.
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 9 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification write cycle no. 1 ( ce controlled, oe is high or low) (1 ) write cycle no. 2 ( oe is high during write cycle) (1,2) data undefined t wc valid address t sce t pwe1 t aw t ha high-z t pbw t hd t sa t hzwe address ce ub, lb we d out d in data in valid t lzwe t sd data undefined t wc valid address t sce t pwe1 t aw t ha high-z t pbw t hd t sa t hzwe address ce ub, lb we d out d in oe data in valid t lzwe t sd
is62ux25616 series 10 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification write cycle no. 3 ( oe is low during write cycle) (1) data undefined t wc valid address low t sce t pwe2 t aw t ha high-z t pbw t hd t sa t hzwe address ce ub, lb we d out d in oe data in valid t lzwe t sd
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 11 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification write cycle no. 4 ( lb , ub controlled, back-to-back write) (1,3) data undefined t wc address 1 address 2 t wc high-z t pbw word 1 word 2 t hd t sa t hzwe address ce ub, lb we d out d in oe data in valid data in valid t lzwe t sd t pbw t ha t ha notes: 1. the internal write time is defined by the overlap of ce = low, ub and/or lb = low, and we = low. all signals must be in valid states to initiate a write, but any can be deasserted to terminate the write. the t sa , t ha , t sd , and t hd timing is referenced to the rising or falling edge of the signal that terminates the write. 2. tested with oe high for a minimum of 4 ns before we = low to place the i/o in a high-z state. 3. we may be held low across many address cycles and the lb , ub pins can be used to control the write function.
is62ux25616 series 12 integrated silicon solution, inc. 1-800-379-4774 target specification sr070-0t 05/01/99 issi ? target specification ordering information sl series commercial range: 0 c to +70 c speed (ns) order part no. package 55 is62up25616sl-55h stsop (ii) is62up25616sl-55b mini bga is62ur25616sl-55h stsop (ii) is62ur25616sl-55b mini bga is62us25616sl-55h stsop (ii) is62us25616sl-55b mini bga is62ut25616sl-55h stsop (ii) is62ut25616sl-55b mini bga 70 is62up25616sl-70h stsop (ii) is62up25616sl-70b mini bga is62ur25616sl-70h stsop (ii) is62ur25616sl-70b mini bga is62us25616sl-70h stsop (ii) is62us25616sl-70b mini bga is62ut25616sl-70h stsop (ii) is62ut25616sl-70b mini bga 100 is62up25616sl-100h stsop (ii) is62up25616sl-100b mini bga is62ur25616sl-100h stsop (ii) is62ur25616sl-100b mini bga is62us25616sl-100h stsop (ii) is62us25616sl-100b mini bga is62ut25616sl-100h stsop (ii) is62ut25616sl-100b mini bga industrial range: C40 c to +85 c speed (ns) order part no. package 55 is62up25616sl-55hi stsop (ii) is62up25616sl-55bi mini bga is62ur25616sl-55hi stsop (ii) is62ur25616sl-55bi mini bga is62us25616sl-55hi stsop (ii) is62us25616sl-55bi mini bga is62ut25616sl-55hi stsop (ii) is62ut25616sl-55bi mini bga 70 is62up25616sl-70hi stsop (ii) is62up25616sl-70bi mini bga is62ur25616sl-70hi stsop (ii) is62ur25616sl-70bi mini bga is62us25616sl-70hi stsop (ii) is62us25616sl-70bi mini bga is62ut25616sl-70hi stsop (ii) is62ut25616sl-70bi mini bga 100 is62up25616sl-100hi stsop (ii) is62up25616sl-100bi mini bga is62ur25616sl-100hi stsop (ii) is62ur25616sl-100bi mini bga is62us25616sl-100hi stsop (ii) is62us25616sl-100bi mini bga is62ut25616sl-100hi stsop (ii) is62ut25616sl-100bi mini bga data retention switching characteristics symbol parameter test condition min. max. unit v dr vcc for data retention see data retention waveform 1.0 3.3 v i dr data retention current vcc = 1.0v, ce 3 vcc C 0.2v, v in 3 v cc C 0.2v 2 m a (for -ll version) or v in 0.2v. no input may exceed vcc+0.2v 1 (for -sl version) t sdr data retention setup time see data retention waveform 0 ns t rdr recovery time see data retention waveform t rc ns data retention waveform ( ce controlled) v cc ce 3 v cc ?0.2v t sdr t rdr v dr ce gnd 2.7v, 2.2v, 1.8v, 1.6v data retention mode note: 1. 2.7v: is62up25616; 2.2v: is62ur25616; 1.8v: is62us25616; 1.6v: is62ut25616.
is62ux25616 series integrated silicon solution, inc. 1-800-379-4774 13 target specification sr070-0t 05/01/99 1 2 3 4 5 6 7 8 9 10 11 12 issi ? target specification ordering information sl ll ries commercial range: 0 c to +70 c speed (ns) order part no. package 55 is62up25616ll-55h stsop (ii) is62up25616ll-55b mini bga is62ur25616ll-55h stsop (ii) is62ur25616ll-55b mini bga is62us25616ll-55h stsop (ii) is62us25616ll-55b mini bga is62ut25616ll-55h stsop (ii) is62ut25616ll-55b mini bga 70 is62up25616ll-70h stsop (ii) is62up25616ll-70b mini bga IS62UR25616LL-70H stsop (ii) is62ur25616ll-70b mini bga is62us25616ll-70h stsop (ii) is62us25616ll-70b mini bga is62ut25616ll-70h stsop (ii) is62ut25616ll-70b mini bga 100 is62up25616ll-100h stsop (ii) is62up25616ll-100b mini bga is62ur25616ll-100h stsop (ii) is62ur25616ll-100b mini bga is62us25616ll-100h stsop (ii) is62us25616ll-100b mini bga is62ut25616ll-100h stsop (ii) is62ut25616ll-100b mini bga industrial range: C40 c to +85 c speed (ns) order part no. package 55 is62up25616ll-55hi stsop (ii) is62up25616ll-55bi mini bga is62ur25616ll-55hi stsop (ii) is62ur25616ll-55bi mini bga is62us25616ll-55hi stsop (ii) is62us25616ll-55bi mini bga is62ut25616sl-55hi stsop (ii) is62ut25616ll-55bi mini bga 70 is62up25616ll-70hi stsop (ii) is62up25616ll-70bi mini bga IS62UR25616LL-70Hi stsop (ii) is62ur25616ll-70bi mini bga is62us25616ll-70hi stsop (ii) is62us25616ll-70bi mini bga is62ut25616ll-70hi stsop (ii) is62ut25616ll-70bi mini bga 100 is62up25616ll-100hi stsop (ii) is62up25616ll-100bi mini bga is62ur25616ll-100hi stsop (ii) is62ur25616ll-100bi mini bga is62us25616ll-100hi stsop (ii) is62us25616ll-100bi mini bga is62ut25616ll-100hi stsop (ii) is62ut25616ll-100bi mini bga issi ? integrated silicon solution, inc. 2231 lawson lane santa clara, ca 95054 tel: 1-800-379-4774 fax: (408) 588-0806 e-mail: sales@issi.com www.issi.com

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